Procesor SR00C Intel Core i7-2600K

Předmětem prodeje je pouýitý procesot i7-2600K General information Type CPU / Microprocessor Family Intel Core i7 Processor number ? i7-2600K Part number CM8062300833908 BX80623I72600K BXC80623I72600K Frequency ? 3.4 GHz Clock multiplier ? 34 Package type 1155-land FC-LGA10 Socket type Socket 1155 (LGA1155) Architecture / Microarchitecture / Other Core stepping D2 Processor core Sandy Bridge Manufacturing technology 0.032 micron The number of cores 4 L2 cache size ? 1 MB L3 cache size 8 MB Features AES AVX EM64T technology ? Enhanced SpeedStep technology ? Execute disable bit ? Hyper-Threading technology MMX SSE SSE2 SSE3 SSE4 SSSE3 Turbo Boost technology Virtualization technology (VT-x) Thermal Design Power ? 95 Watt Notes on sSpec SR00C The part supports DDR3-1066 and DDR3-1333 memory. Direct Media Interface speed is 5 GT/s. Integrated graphics controller runs at 850 MHz. Frequency of integrated graphics controller in turbo mode is 1350 MHz. The part is discontinued. Last order date is March 29, 2013. Last shipment date for OEM processors is September 27, 2013. Related S-Spec numbers In addition to the SR00C S-Spec, this processor was also manufactured with two pre-production S-Spec numbers: Stepping S-Spec CM8062300833906 CM8062300833908 BX80623I72600K BXC80623I72600K D1 Q1EB + D2 Q1HL + SR00C + + + NOTE: Engineering and qualifications samples are marked with this color SR00C CPUID information View / search public CPUID submissions Intel Core i7 i7-2600K SR00C Part number: CM8062300833908 Measured Frequency: 3411 MHz Comment: Submitted by: CPU-World General information Vendor: GenuineIntel Processor name (BIOS): Intel(R) Core(TM) i7-2600K CPU @ 3.40GHz Cores: 4 Logical processors: 8 Processor type: Original OEM Processor CPUID signature: 206A7 Family: 6 (06h) Model: 42 (02Ah) Stepping: 7 (07h) TLB/Cache details: 64-byte Prefetching Data TLB0: 2-MB or 4-MB pages, 4-way set associative, 32 entries Data TLB: 4-KB Pages, 4-way set associative, 64 entries Instruction TLB: 4-KB pages, 4-way set associative, 64 entries L2 TLB: 1-MB, 4-way set associative, 64-byte line size Shared 2nd-level TLB: 4 KB pages, 4-way set associative, 512 entries Cache details Cache: L1 data L1 instruction L2 L3 Size: 4 x 32 KB 4 x 32 KB 4 x 256 KB 8 MB Associativity: 8-way set associative 8-way set associative 8-way set associative 16-way set associative Line size: 64 bytes 64 bytes 64 bytes 64 bytes Comments: Direct-mapped Direct-mapped Non-inclusive Direct-mapped Inclusive Shared between all cores Supported instructions Instruction set extensions Additional instructions MMX CLFLUSH SSE CMOV SSE2 CMPXCHG16B SSE3 CMPXCHG8B SSSE3 FXSAVE/FXRSTORE SSE4.1 MONITOR/MWAIT SSE4.2 PCLMULDQ AES POPCNT AVX RDTSCP SYSENTER/SYSEXIT XSAVE/XRESTORE states Integrated features and technologies Major features Other features On-chip Floating Point Unit 36-bit page-size extensions 64-bit / Intel 64 64-bit debug store NX bit/XD-bit Advanced programmable interrupt controller Hyper-Threading Technology CPL qualified debug store Intel Virtualization Clock modulation duty cycle extension Turbo Boost Debug store Enhanced SpeedStep Debugging extensions Digital Thermal Sensor capability LAHF/SAHF support in 64-bit mode Machine check architecture Machine check exception Memory-type range registers Model-specific registers Package thermal management Page attribute table Page global extension Page-size extensions (4MB pages) Pending break enable Perfmon and Debug capability Physical address extensions Power Limit Notification capability Process context identifiers Self-snoop TSC rate is ensured to be invariant across all states Thermal monitor Thermal monitor 2 Thermal monitor and software controlled clock facilities Time stamp counter Timestamp counter deadline Virtual 8086-mode enhancements xTPR Update Control